The case for Type 3: The need for better SID filter definitions

Update! I have redefined the Type 3 slightly for V10. The reason for defining them anew was that I was able to streamline the calculation, and also base it on the electrical properties of the system.

The first type is based on spline interpolation of control points, which are based on measurements of actual chip. There's nothing wrong with Type 1 filters per se, provided you can supply the accurate measurement data, but the design is a black-box approach and offers little insight into the workings of the chip.

The Type 2 filter is an attempt of formalize the SID filters somewhat. It is based on recognizing that the SID filter is composed of roughly two components: a base level of frequency and an added exponential function. However, the exponential is capped at 4 kHz for historical reasons, and the part under 4 kHz fits only poorly to real chips.

Type 3 reproduces known filters from a few parameters, allowing better modelling

Base level (frequency for CF=0 setting for most chips of its type) is generally something between 150 to 350 Hz for the chips. (Values are around 2M in ohms.) It is currently believed to be lower for R4 on account of the different chip material that has a higher characteristic resistance.

Type 3 parameters and calculation

BaseResistance=2.0e6
Offset=4.5e8
Steepness=1.0065
MinimumFETResistance=1.6e4

The basic equations are, with fc as the FC register value and frequency as the output:

frequency = 1 / (2 * PI * Cap1A * resistance), with
resistance = (BaseResistance * dynamic) / (BaseResistance + dynamic) and
dynamic = MinimumFETResistance + Offset / (Steepness ** kinked_dac(fc))

The kinked_dac() estimates the effect from the fact that the SID DACs are not exactly R-2R ladders due to difficulties of manufacturing the resistors. It seems that the 1-bits involved feed a slight excess current, which seems to be about 5 % per bit in average. In truth the resistors involved are not uniform due to random process variation, and the most accurate model would have 11 values, one for each bit. In practice only 2 or 3 or them would be measurable, though.

dac = 0.95
def kinked_dac(x):
    bits = 0
    max = 0
    for _ in range(0, 11):
        weight = 2 ** (_ * dac);
        if x & (1 << _):
            bits += weight
        max += weight
    return bits / max * 2048